中文
- 中文
- English
- français
- Deutsch
- русский
- italiano
- español
- português
- 日本語
- 한국의

400G QSFP-DD EDR4 SM MPO12 2km Optical Transceiver

Features

IEEE 802.3bs Specification compliant
QSFP-DD MSA compliant
4x106.25 Gbps PAM4 optical interface
8x53.125 Gbps PAM4 electrical interface
I2C interface with integrated DDM
Up to 2km transmission distance on single mode fiber (SMF) with FEC
up ply voltage: 3.3 V
Maximum power consumption: 12 W
MTP/MPO-12 connector
Operating case temperature: 0 to 70 °C
RoHS compliant

Applications

400G Ethernet
Datacenter enterprise networking

现在查询下载

类别

热门产品

产品详细信息

RQDD-400G-EDR4

400Gbps QSFP-DD EDR4 2KM EML MPO transceiver

400G QSFP-DD EDR4

General description

RQDD-400G-EDR4 is a 400 Gbps Quad Small Form Factor Pluggable-Double Density (QSFP-DD) optical transceiver designed for 2km optical communication applications.

Functional description

The module incorporates 4 parallel channels on 1310 nm center wavelength operating at 100 Gbps per channel. The transmitter path incorporates a quad channel electro- absorption modulated laser (EML) driver together with 4 parallel EMLs. On the receiver path, 4 photodiodes (PDs) are connected with a quad channel transmission impedance amplifier (TIA) to convert the parallel 400 Gbps optical input into 4 channels of parallel 100Gbps PAM4 electrical signals. A digital signal processor (DSP) is used to convert 8 channels of 25 GBaud PAM4 signals into 4 channels of 50 GBaud PAM4 signals and also an 8-channel retimber and forward error corrector (FEC) block are integrated in this DSP. The electrical interfaceter is compliant with IEEE 802.3bs and QSFP-DD MSA in the transmitting and receiving directions, and the optical interface is compliant to QSFP-DD MSA with MTP/MPO-12 connector.

A single +3.3 V power supply is required to power up this product. As per MSA specifications, the module offers 7 low speed hardware control pins: SCL, SDA, ModSelL, ResetL, LPMode/TxDis, ModPrsL and IntL/RxLOSL. SCL and SDA are a 2-wire serial interface between the host and module using the I2C protocol. SCL is defined as the serial interface clock signal and SDA as the serial interface data signal. Both signals are open- drain and require pull-up resistors to +3.3 V on the host side. The pull-up resistor value should be 4.7 kohms to 10 kohms.

ModSelL is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. ResetL is a signal that allows the host to reset the module. A low level on the ResetL signal for longer than the minimum pulse length initiates a complete modulele reset, returning all all user module setting Sule settings tos to their default state. LPMode/TxDis is an input signal from the host operating with active high logic. If this pin is “high”, the module enters a low-power state. ModPrsL is used to indicate whether the module is plugged in on the connector, ModPrsL is pulled low when inserted and released to high when it is physically absent from the host connector. IntL/RxLOSL pin is used as interruption. When “Low”, it indicates a possible module operational fault, such as alarm and warning.

Absolute maximum ratings

It has to be noted that the operation in excess of any individual absolute maximum ratings might cause permanent damage to this module.

Parameter	Symbol	Min	Max	Unit	Note
Storage Temperature	TS	-40	85	°C
Operating Case Temperature	TOP	0	70	°C
Power Supply Voltage	VCC	-0.5	3.6	V
Relative Humidity (non-condensation)	RH	0	85	%

Recommended operating conditions

Parameter	Symbol	Min	Typical	Max	Unit	Note
Operating Case Temperature	TOP	0		70	°C
Power Supply Voltage	VCC	3.135	3.3	3.465	V
Power Consumption				12	W
Supply Current	Icc			3.64	A
Pre-FECBitError Ratio				2.4x10-4
Post-FECBitError Ratio				1x10-12		1
Link Distance	D			2	km	2

Notes:

1. FEC provided by host system.

2. FEC required on host system to support maximum distance.

Digital diagnostic functions

The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.

Parameter

Symbol

Min

Max

Unit

Note

Temperature Monitor

Absolute Error outer Error

DMI_Temp

-3

°C

Cover full operating

temperature range

Supply Voltage Monitor

Absolute ErroruteError

DMI _VCC

-0.1

0.1

Cover full operating

temperature range

Channel RX Power Monitor

Absolute ErrorteError

DMI_RX_Ch

-3

Channel Bias Current

Monitor

DMI_Ibias_Ch

-10%

10%

Channel TX Power Monitor

Absolute Error

DMI_TX_Ch

-3

Edge connector and pinout description

The electrical pinout of the QSFP-DD module is shown in Figure 1 below.

400G QSFP-DD EDR4

MSA compliant connector.

Mechanical dimensions

400G QSFP-DD EDR4

Mechanical outline

Ordering information

Part Number	Product Description
RQDD-400G-EDR4	400G QSFP-DD EDR4 2KM EML MPO

相关产品

400G QSFP28-DD FR4 CWDM4 2km LC Optical Transceiver

400G QSFP-DD FR4 optical transceiver module, support 400Gb/s and up to 2 km transmission on SM fiber, it works in high-speed IDC connection solutions.

400G QSFP-DD DR4 PAM4 1310nm 500M MPO Optical Transceiver

400G QSFP-DD DR4 optical transceiver module, support 400Gb/s and up to 500m transmission on SM fiber, it works in high-speed IDC connection solutions.

400G CFP2 DCO Optical Transceiver Module

400G CFP2 optical transceiver module Used on the system's motherboard Up to2000 km in MAN DWDM application

400G OSFP SR4 MM MPO12 Optical Transceiver IB

Features OSFP Serial Optical Interface 4x100G PAM4 retimed 400GAUI-4 electrical interface Active Optical cable 4 channel VCSEL arrays and 4 channels PIN photo detector arrays Maximum link length of 60m on OM3 or 100m on OM4 OSFP MSA Compliant Hot Pluggable OSFP form factor Compliant to OSFP Module Specification Rev 5.0 Compliant with CMIS 5.2 Support Protocol Compliant with IEEE 802.3db Compliant to IEEE 802.3ck Low Power Consumption Less than 8W in temperature range of 0 to 70℃ Applications 400GBASE-SR4 400G Ethernet Data center

400G OSFP DR4 SM MPO12 Optical Transceiver IB

Features Form Factor: Hot-pluggable OSFP form factor Data Rate: Aggregate data rate of 425 Gb/s and Breakout data rate of 106.25 Gb/s Optical Interface: Compliant to 400GBASE-DR4 and 4x100GBASE-DR Transmitter: EML 1310nm transmitter Electrical Interface: Compliant to 400GAUI-4 and 4x100GAUI-1 Receiver: PIN and TIA array on the receiver side Management Interface: I2C management interface Reach: Up to 500m over MPO-12/APC single mode fiber Power consumption: 9 W max Operating case temperature: 0 ~ 70 ℃ Power Supply: Single 3.3V power supply Compliance Form Factor: OSFP MSA Optical: IEEE802.3bs Electrical: IEEE802.3ck Firmware: CMIS Environment: RoHS Stability: GR-468-CORE Applications 400Gb/s Ethernet Data Center InfiniBand

400G QSFP-DD DR4 SM MPO12 Optical Transceiver

Features QSFP-DD Serial Optical Interface 8x50G PAM4 retimed 400GAUI-8 electrical interface MPO-12 connector with 8° angled end-face Up to 500m on SMF with FEC QSFP-DD MSA Compliant Hot Pluggable QSFP-DD form factor Compliant with CMIS5.2 Support Protocol IEE802.3.bs 400GBASE-DR4 Specification compliant Low Power Consumption Less than 10.5W in temperature range of 0 to 70℃ Applications 400Gb/s Ethernet Data Center InfiniBand interconnects

400G QSFP-DD FR4 2KM Optical Transceiver

Applications 400G BASE-FR4 Ethernet Data Center Interconnect InfiniBand Interconnect Enterprise Networking Features Compliant to QSFP-DD MSA 4 CWDM lanes MUX/DEMUX design 100G Lambda MSA 400G-FR4 Specification compliant Maximum power consumption 10W

100G CFP转QSFP28转换模块带FEC

Features CAUI -10 Electrical Interface:10 Lanes @10Gbit/s for CFP port CAUI -4 Electrical Interface:4 Lanes @25.78Gbit/s for QSFP28 port Hot Pluggable Low latency FEC MDIO, I2C Support Compliant to CFP MSA Case operating temperature: 0 to 70 °C The RQ-CFP-QSFP28-F Adaptor Module converts a 100 Gigabit CFP port into a 100 Gigabit QSFP28 port. With the Adaptor Module, customers have the flexibility to use the 100 Gigabit CFP interface port of a switch with CFP modules or QSFP28 modules. For 100G Ethernet, reference clock can switch 161.133mhz or 644.531mhz; For OUT 4, reference clock can switch 174.703mhz or 698.812mhz; Users can control whether FEC function is enabled or not through register configuration.

联系我们